Read about the history of Schemata, why it exists and why you can get it here at no cost. Schemata is written in LISP using the Franz Allegro tools. The current version performs Spice simulation using uses Simucad’s SmartSPICE program to which it connects using low level Window’s functions (you need never see the SmartSPICE window) just point and click. Schemata is intimately connected to other MS Windows – all common cut, paste operations etc are supported.
Schemata is a “serious” tool – it is not a toy – it supports interfaces to LVS/DRC via LVS netlists, it reads StarRC layout files and provides post layout simulations and back annotations. It is however only an Analog Design tool – use it for complex analog cells – it will not help you with layout and it will not help you with digital designs. Sadly, Schemata is not compatible with any other design tools (it could possibly be made so but many features would have to be disabled to read for example an EDIF format file – when you use Schemata it will become clear that it has features that are not envisaged in the industry standard file formats). Schemata does however write all the standard netlist formats (.sp, .cdl . etc) including a very nice Verilog format so you can still use it. You can certainly use Schemata to learn about analog design – it is extremely effective at rapidly developing and testing analog cells – when you become familiar with Schemata you will find you can draw a new op-amp, plot response measure settling time and bandwidth in minutes if not in fact in seconds.
Schemata has a huge number of features – two particular highlights are:
· Schemata supports a connection to a Wiki – currently Dokuwiki is used. Single clicks insert schematics, comments and simulation results into the Wiki as you proceed allowing a “documentation stream” to be built up in the background as you work. Later when viewing the wiki all links are to the real data – a click on a graph recovers the data to zoom in etc, a click on the schematic loads up Schemata and fetches the design to be edited. (However, you will need some expertise in setting up dokuwiki at your site – I do not provide instructions as to how to do this).
· Schemata can use Excel as a net list definition tool. Why ever would you do this? Because as Analog VLSI becomes common designs on 90nm and less can exploit a new methodology of analog design: no longer constrained to hundreds of devices analog designs can use tens of thousands of transistor and can achieve functionality through complex patterns of interconnection. It is essentially impossible to connect 8000 devices on a schematic in such a way that the pattern of interconnections impresses, for example, a quadrature (sine and cosine) pattern on a signal passing through the network, but it turns out to be reasonably easy to do this in Excel. I know this sounds ridiculous, but Excel is a powerful tool – with a few macros and mouse clicks you can set up a complex interconnection of more than 100,000 FETS. Schemata uses MS tools to directly access Excel and translates the xls file into the netlist. (I will document this feature as soon as I complete the other more common feature documentation)